PISCATAWAY, N.J., April 21, 2021 (GLOBE NEWSWIRE) — A White Paper titled “The Future of Low-Latency Memory” by the memory and storage specialists, Objective Analysis and Coughlin Associates, compared and contrasted different memory interfaces. Their findings were presented and published at the SNIA Persistent Memory + Computational Storage Summit (April 21-22, 2021). In this case, the focus was on the critical needs of Near Memory rather than Far Memory which is widely addressed in our industry. The white paper investigates how Near Memory attachment can create advantages in performance, cost, and flexibility.
The Near Memory interfaces discussed included DDR, HBM (High Bandwidth Memory) and OMI (Open Memory Interface). OMI is a highly tuned bus derived from OpenCAPI and not only pushes the boundaries in meeting Near Memory needs, it’s an open standard and ready for adoption as products exist today.
“Memory channels consume valuable die area on processors,” said Jim Handy of Objective Analysis. “By moving the DRAM signals off the processor and into the DIMM, OMI increases memory channel bandwidth while reducing the die area penalty on the processor.”
“OMI can provide the high capacity, low latency, high performance Near Memory that will be critical for some of the most demanding big data applications,” said Tom Coughlin, Coughlin Associates.
Allan Cantle, OpenCAPI Consortium’s Technical Director commented, “I am delighted with Jim’s and Tom’s analysis of Near Memory trends and challenges. Unifying these disparate interfaces is a top priority and OMI looks to have all the right ingredients for our industry to rally around.”
About OpenCAPI ConsortiumTM
The OpenCAPI Consortium is a not-for-profit organization formed in 2016 and is an open forum to manage the OpenCAPI specifications. OpenCAPI is an open coherent high-performance bus interface. To learn more about the OpenCAPI Consortium, go to https://opencapi.org
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